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path: root/arch/riscv/cpu
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2019-02-27riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel1-0/+20
2019-02-27riscv: Rename cpu/qemu to cpu/genericAnup Patel4-1/+1
2019-01-15riscv: move the AX25-specific implementation of flush_dcache_allLukas Auer1-0/+22
2018-12-18riscv: Save boot hart id to the global dataBin Meng1-0/+4
2018-12-18riscv: Return to previous privilege level after trap handlingBin Meng1-8/+0
2018-12-18riscv: Fix context restore before returning from trap handlerBin Meng1-1/+1
2018-12-18riscv: Move trap handler codes to mtrap.SBin Meng3-90/+112
2018-12-18riscv: Do some basic architecture level cpu initializationBin Meng1-1/+26
2018-12-18riscv: Update supports_extension() to use desc from cpu driverBin Meng1-0/+26
2018-12-18riscv: Remove non-DM version of print_cpuinfo()Bin Meng1-37/+0
2018-12-18riscv: Probe cpus during bootBin Meng2-0/+27
2018-12-18riscv: qemu: Add platform-specific Kconfig optionsBin Meng1-0/+11
2018-12-18riscv: ax25: Hide the ax25-specific Kconfig optionBin Meng2-11/+18
2018-12-18riscv: qemu: Create a simple-bus driver for the soc nodeBin Meng1-0/+14
2018-12-05riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen1-2/+0
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel1-8/+15
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen6-1/+114
2018-11-26riscv: save hart ID and device tree passed by prior boot stageLukas Auer2-2/+16
2018-11-26riscv: do not blindly modify the mstatus CSRLukas Auer1-4/+4
2018-11-26riscv: remove unused labels in start.SLukas Auer1-9/+0
2018-11-26Drop CONFIG_INIT_CRITICALBin Meng1-13/+0
2018-11-26riscv: align mtvec on a 4-byte boundaryLukas Auer1-1/+1
2018-11-26riscv: fix inconsistent use of spaces and tabs in start.SLukas Auer1-161/+161
2018-10-03riscv: Move do_reset() to a common placeBin Meng2-17/+0
2018-10-03riscv: Add QEMU virt board supportBin Meng3-0/+52
2018-10-03riscv: Make start.S available for all targetsBin Meng4-3/+3
2018-10-03riscv: Add a helper routine to print CPU informationBin Meng2-0/+54
2018-10-03riscv: Fix coding style issues in the linker scriptBin Meng1-30/+28
2018-10-03riscv: Move the linker script to the CPU root directoryBin Meng1-0/+0
2018-08-20riscv: Include bss subsections in linker scriptAlexander Graf1-1/+1
2018-07-25efi_loader: Rename sections to allow for implicit dataAlexander Graf1-10/+16
2018-05-29riscv: cpu: nx25: Rename as ax25Rick Chen4-2/+2
2018-05-29efi_loader: Enable RISC-V supportRick Chen1-0/+16
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini4-9/+4
2018-03-30riscv: ae250: Support DT provided by the board at runtimeRick Chen1-0/+2
2018-01-12riscv: cpu: Add nx25 to support RISC-VRick Chen4-0/+403