path: root/arch/riscv/include
AgeCommit message (Expand)AuthorFilesLines
2019-02-27riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrdAnup Patel1-0/+1
2019-02-27riscv: Add place-holder asm/arch/clk.h for driver compilationAnup Patel1-0/+14
2019-02-27riscv: Add asm/dma-mapping.h for DMA mappingsAnup Patel1-0/+38
2018-12-18riscv: Save boot hart id to the global dataBin Meng1-0/+1
2018-12-18riscv: Add indirect stringification to csr_xxx opsBin Meng1-7/+9
2018-12-18riscv: Add exception codes for xcause registerBin Meng1-0/+15
2018-12-18riscv: Add CSR numbersBin Meng1-0/+221
2018-12-18riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng2-0/+22
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel1-0/+6
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen1-0/+3
2018-11-26riscv: do not reimplement generic io functionsLukas Auer1-28/+3
2018-11-26riscv: make use of the barrier functions from LinuxLukas Auer2-7/+71
2018-11-26riscv: fix use of incorrectly sized variablesLukas Auer3-6/+10
2018-11-20Use _AC and UL macros from linux/const.hBaruch Siach1-0/+2
2018-10-03riscv: Remove CSR read/write defines in encoding.hBin Meng1-46/+4
2018-10-03riscv: Add a helper routine to print CPU informationBin Meng1-0/+124
2018-10-03riscv: Remove mach typeBin Meng2-30/+0
2018-10-03riscv: Remove setup.hBin Meng2-207/+0
2018-09-10arch: types.h: factor out fixed width typedefs to int-ll64.hMasahiro Yamada1-31/+2
2018-05-29riscv: cpu: nx25: Rename as ax25Rick Chen1-5/+5
2018-05-29SPDX: Convert single license tags to Linux Kernel styleRick Chen1-2/+1
2018-05-29riscv: Add board_quiesce_devices stubAlexander Graf1-0/+1
2018-05-29riscv: Add setjmp/longjmp codeAlexander Graf1-0/+26
2018-05-15riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue1-0/+2
2018-05-15riscv: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue1-0/+2
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini13-27/+13
2018-03-30riscv: bootm: Remove ATAGSRick Chen1-49/+0
2018-03-30riscv: checkpatch: Fix alignment should match open parenthesisRick Chen2-19/+13
2018-03-30riscv: checkpatch: Fix use of volatileRick Chen1-1/+1
2018-03-30riscv: checkpatch: Fix Macro argument reuseRick Chen4-15/+35
2018-01-12riscv: nx25: include: Add header files to support RISC-VRick Chen21-0/+1669